Etched

Platform Validation Engineer

Etched • San Jose, California, United States
Python

About Etched
Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary
We are seeking an experienced and motivated Platform Validation Engineer to validate system hardware and printed circuit board (PCB) functionality and ensure robust power and signal margins across all interfaces. In this role, you will collect and analyze lab data to validate hardware performance, support post-silicon characterization, and ensure reliable operation across multiple subsystems, including PCIe and I2C.

Key Responsibilities

  • Perform system hardware and PCB functional verification to ensure all features meet design specifications, including validation of power and signal integrity margins

  • Collect and analyze lab data to verify power delivery, signal integrity, and overall system robustness

  • Support post-silicon validation by identifying key performance metrics and conducting PVT, power, and thermal characterization

  • Evaluate PCIe performance, including signal integrity, eye opening measurements (EOM), and bit error rate (BER), to ensure adequate operating margins

  • Identify hardware issues, perform root cause analysis, and drive issues to resolution in collaboration with cross-functional teams

  • Design and execute DOE experiments to debug hardware issues and optimize system performance

  • Validate power sequencing, microcontroller functionality, and conduct power efficiency, noise, and transient analysis

  • Perform detailed characterization of I2C bus systems to ensure compliance with design requirements

  • Track and document PCB issues and validation results, ensuring clear communication with relevant stakeholders

  • Collaborate closely with design, firmware, and system engineering teams to ensure end-to-end hardware quality

You may be a good fit if you have

  • A Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field

  • Proven experience with hardware validation, lab testing, and PCB-level debugging

  • Strong understanding of power integrity and signal integrity principles and measurement techniques

  • Familiarity with PCIe, I2C, and other common hardware interfaces and protocols

  • Experience using lab equipment such as oscilloscopes, logic analyzers, spectrum analyzers, and power supplies

  • Hands-on experience debugging hardware issues and performing root cause analysis

  • Knowledge of power sequencing and microcontroller-based systems

  • Strong analytical and problem-solving skills, including experience with scripting languages such as Python or Matlab

  • Excellent communication skills and the ability to work effectively in cross-functional teams

Benefits

  • Medical, dental, and vision packages with generous premium coverage

    • $500 per month credit for waiving medical benefits

  • Housing subsidy of $2k per month for those living within walking distance of the office

  • Relocation support for those moving to San Jose (Santana Row)

  • Various wellness benefits covering fitness, mental health, and more

  • Daily lunch and dinner in our office

Compensation Range

  • $150,000 - $275,000

How we’re different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.